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Description: NAND Flash Controller & ECC VHDL Code-NAND Flash Controller
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Size: 23323 |
Author: jp1234567 |
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Description: nand flash NAND01GR3B (st)的仿真模型 (VHDL) 的-nand flash NAND01GR3B (st), the simulation model (VHDL)
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Size: 132335 |
Author: chen |
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Description: 用CPLD实现NAND FLASH接口的VHDL源码
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Size: 871768 |
Author: xillinx |
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Description:
Platform: |
Size: 132096 |
Author: chen |
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Description: 三星flash编程Verilog程序,单页编程,支持K9K4G08芯片-Samsung' s flash programming Verilog program, single-page programming, support K9K4G08 chip
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Size: 1024 |
Author: 不知道 |
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Description: 用VHDL实现NAND Flash 的I/O 读写操作-with VHDL programme realize NAND Flash I/O read & write
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Size: 19456 |
Author: wuqixuan |
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Description: NAND FLASH控制器的试验 使用VHDL语言来试验的- nand flash controler test by using VHDL make it effect
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Size: 57344 |
Author: 星星 |
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Description: NAND flash的VHDL控制代码,可以看一下-VHDL control code of NAND flash
Platform: |
Size: 5120 |
Author: 沈碧云 |
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Description: 一个使用VHDL语言并通过FPGA实现的NAND的读写控制和校验算法的程序-Using VHDL and FPGA implementation of the NAND read and write control procedures and checksum algorithms
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Size: 22528 |
Author: 宋珂 |
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Description: 用于NAND FLASH CONTROLLER 中的的 ecc 各个模块VHDL代码,已通过测试。
-For NAND FLASH CONTROLLER in ecc VHDL code of each module, has been tested.
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Size: 190464 |
Author: yongjiu |
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Description: 新手学习vhdl语言在quartus上编写的12个程序,能完成与非门等简单功能的小程序-Novice learning vhdl language written in quartus 12 program, to complete a small program with simple functions such as NAND gate
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Size: 124928 |
Author: zhengce |
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Description: ABOUT NAND GATE VHDL CODE
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Size: 8192 |
Author: nandini |
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Description: 很好的NAND Flash 硬件驱动语言,支持VHDL和verilog 语言方便移植,如果有想用FPGA直接驱动NAND flash而又不知如何下手的朋友肯定喜欢。- NAND Flash Controller Reference Design
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File List
1. RD1055/doc/rd1055.pdf --> NAND Flash Controller Reference Design document
RD1055/doc/rd1055_readme.txt --> Read me file (this file)
2. RD1055/Project/nand_flash_cntl.lpf --> preference file for the design
RD1055/Project/nfcm_tb_vhd.udo_example --> vital glitch removal example
3. /RD1055/simulation/verilog/rtl_verilog.do --> verilog rtl simulation script
/RD1055/simulation/verilog/timing_verilog.do --> verilog timing simulation script
/RD1055/simulation/vhdl/rtl_verilog.do --> vhdl rtl simulation script
/RD1055/simulation/vhdl/timing_verilog.do --> vhdl timing simulation script
4. RD1055/source/verilog/ACounter.v --> sourc
Platform: |
Size: 1192960 |
Author: cuiwei |
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Description: 二输入与门、或门、与非门VHDL代码描述-Two-input AND gates, OR gates, NAND gate VHDL code description
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Size: 1024 |
Author: chen han |
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Description: 用VHDL语言描述了各种门电路,与门,或门,非门,与非,或非-VHDL language describes the various gates, AND gates, OR gates, NAND, NAND, NOR, etc.
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Size: 788480 |
Author: 魏银玲 |
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Description: 四输入与非门设计四输入端与非门的设计。
设计一个四位输入、一位输出的与非门。(Four input NAND gate design)
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Size: 135168 |
Author: 苏克sama
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